Entry Level Professional Digital Design Engineer (2400355)

Entry Level Professional Digital Design Engineer (2400355)
Company:

Spelman College


Details of the offer

Entry Level Professional – Digital Design Engineer (2400355)Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact As part of the Custom Compute & Storage Business unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help make each design meet our customers' specifications whether they're a major telecom organization or automotive company.
What You Can Expect In this hybrid in-office/work-from-home role in Westboro MA:
Design key components of System-On-Chips (SOCs) for Marvell's next generation of Accelerated Infrastructure processors. Closely work with architects, verification, physical design and other logic designers for requirements specification, design execution, debug, and timing closure.Specify and present for review designs that meet feature, area and performance requirements, that meet software programming requirements, and that form the basis for clear and concise verification test plans.Code designs in Verilog to meet area estimates, targeted clock frequencies, and clock-domain-crossing needs, using best RTL design practices.Support simulation-based and formal verification in explaining design behavior, defining stimulus and assertions and in debugging issues.Analyze static timing reports to optimize your logic to converge on timing closure.Participate in group-wide user and methodology groups to advance the general knowledge and best practices in any of the above areas.What We're Looking For To be successful in this role you must:
Have completed a Bachelor's Degree in Electrical Engineering or Computer Engineering and have 2 to 3 years of related professional experience OR a Master's Degree and/or PhD in those fields.Your coursework must have included some analog classes, Verilog or VHDL, basic circuits, and computer architecture. You should have a focus in VLSI or show projects in your courses that directly relate to chip design.Have used a tool like Synopsys, Cadence, or Mentor to run simulations.Have used a tool like Synopsys for synthesis and static timing analysis.Be comfortable working in a Linux environment and doing scripting with Python.Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely.Work and communicate well with your team, keeping them in the loop about your progress, issues you encounter, and any deviations from the planned schedule.Expected Base Pay Range (USD) 93,800 – 138,750, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity. Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages – health or financial? Ask your recruiter during the interview process.
This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at ******** .

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Source: Grabsjobs_Co

Job Function:

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Entry Level Professional Digital Design Engineer (2400355)
Company:

Spelman College


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