Asic Design Engineer

Details of the offer

Responsibilities: Design and implement module level micro-architectureParticipate in top-level implementation and integrationParticipate in both top level and module level RTL coding, simulation, synthesis and timing closureGenerate test cases for the module level and chip levelParticipate in FPGA emulation and post-silicon validationWrite design specificationRequirements: MS in Electrical or Computer Engineering with some related experience2+ years of ASIC design experience with knowledge of ASIC design flow, including hands-on experience in ASIC chip design and integrationRequires knowledge of Verilog, system Verilog, C or C++ languages, digital image processing and chip-level tape out procedure from initial PRD, design, verification, timing closure, FPGA emulation and ECOKnowledge of display technology is a plusKnowledge of UVM is a plusKnowledge of DFT(Scan/MBIST/Functional Pattern) is a plusAnnual base salary for this role in California, US is expected to be between $120,000 - $150,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.

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Nominal Salary: To be agreed

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